Analog Mixed Signal Design Engineer, HCMC

5 dni temu

Warszawa, Polska Synopsys, Inc. Pełny etat

Position : Analog Mixed Signal Design Engineer Location : Etown 5 building, Tan Binh Ward, Ho Chi Minh city We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. What You’ll Be Doing: Develop protection schemes and circuit architectures for advanced process technologies. Define device sizing, evaluate design constraints, and ensure design robustness. Perform ESD verification using PERC tools and generate detailed verification reports. Drive ESD review activities and ensure timely closure of all ESD‑related findings. Collaborate with internal teams to debug setup issues and resolve ESD/LUP violations. Provide technical guidelines, best practices, and design recommendations for ESD protection. Deliver technical assistance to customers, addressing inquiries and supporting design integration when needed. Authority: Normally receives detailed instructions on all work. Follows standard practices and procedures in analyzing situations or data from which answers can be readily obtained. Applies company policies and procedures to resolve routine issues. What You’ll Need: Bachelor's or Master's degree in Electronics - Electrical Engineering, or Telecommunications; Computer Science Engineering or related ones. 1-2 year working experience in similar roles or fresh graduates (Fresh graduates are also welcomed and offered the on-the-job training to adapt the position’s requirements.) Basic understanding of timing analysis, SPICE simulation, and ESD concepts. Experience with scripting languages such as Python and TCL for automation and data processing. Strong problem-solving abilities and keen attention to detail. Good verbal and written English communication skills. Highly responsible and self-motivated, with a strong sense of ownership over your work. Collaborative team player, open to feedback and eager to learn from others. Detail-oriented and methodical, always striving for accuracy and quality. Effective communicator, able to articulate technical concepts clearly. Adaptable and resilient in the face of new challenges or shifting priorities. Enthusiastic about contributing to a diverse, inclusive, and innovative workplace. The Team You’ll Be A Part Of: You’ll join the Synopsys UCIe Design Team, a dynamic group of engineers specializing in advanced chiplet interconnect and analog mixed-signal technologies. This is global team, which is working on state-of-the-art UCIe, 2.5D/3D IC, and Tbps die-to-die interfaces. As a team member, you’ll receive structured training, mentorship, and exposure to the complete design flow, helping you grow into a technical expert or future design leader. If you are passionate about precision timing analysis and eager to work in a collaborative, innovative environment, we’d love to have you on our team. #J-18808-Ljbffr

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