Senior Analog IP Design Engineer
1 tydzień temu
Job Description
At Cadence Design Systems, Inc., we are seeking a skilled Senior Analog IP Design Engineer to join our team. As a key member of our analog IP development team, you will be responsible for designing and developing high-quality analog IP blocks and subsystems, as well as architectural design of larger systems.
Key responsibilities include:
- Participating in the development and customization of analog IP blocks and subsystems
- Designing and developing architectural designs of larger systems
- Providing high-quality designs consistently and reliably
- Collaborating with layout teams on and offsite
- Producing and presenting design review documentation
We are looking for a candidate with a strong background in CMOS IC development, including spec definition, design, post-layout verification, manufacture, characterization, and production test. Additionally, the ideal candidate will have experience in high-speed SerDes, ADC and DAC, PLL, LDO, BandGap, Power Management, MIPI, and other interface IPs, as well as relevant experience in 40nm design or more advanced process nodes.
Requirements:
- 2 years of experience in analog IP design or a relevant combination of education, training, and experience
- Strong understanding of design for mass production and for test
- Knowledge of simulation and modeling tools such as Spectre/RF, ADS, Matlab, and Simulink
- Knowledge of analog IC layout techniques, matching, signal integrity, and parasitics
- Ability to work independently and collaborate remotely with team members
We offer a competitive salary package, flexible working hours, work-from-office or hybrid options, continuous professional development, and a range of benefits, including employee stock purchase plan, bonuses, and stocks. If you are a skilled analog IP design engineer looking for a new challenge, please submit your application.
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