Senior Analog IP Design Engineer
4 tygodni temu
Job Description
Principal Analog IP Design Engineer
Cadence Design Systems, Inc. is seeking a highly skilled Principal Analog IP Design Engineer to join our team in Warsaw, Poland.
The successful candidate will be responsible for the development and customization of analog IP blocks and subsystems, as well as architectural design of larger systems. They will provide high-quality designs consistently and reliably in a customer-driven environment.
Key responsibilities include:
- Participating in spec definition and effort estimations
- Collaborating with layout teams on and offsite
- Producing and presenting design review documentation according to internal quality flows
- Supporting customer requirements
The ideal candidate will have:
- 2 years of experience in the job offered or a relevant suitable combination of education, training, and experience
- Knowledge of the CMOS IC development process
- Knowledge in areas such as High Speed SerDes, ADC and DAC, PLL, LDO, BandGap, Power Management, MIPI, and other Interface IPs
- Relevant experience in 40nm design or more advanced process nodes
- A strong understanding of design for mass production and for test
- Knowledge of simulation and modeling tools such as Spectre/RF, ADS, Matlab, and Simulink
- Knowledge of Analog IC Layout techniques, matching, signal integrity, parasitics, etc.
- Ability to work independently and collaborate remotely with team members
- Flexibility in working on multiple projects in parallel
Cadence Design Systems, Inc. offers a competitive salary package, flexible working hours, work-from-office or hybrid options, continuous professional development, and a range of benefits including employee stock purchase plan, bonuses, stocks, private medical care, life insurance, multisport plus cards, social fund benefits, recommendation bonuses, and internal recognition program.
Apply now to take the first step in your career as a Principal Analog IP Design Engineer at Cadence Design Systems, Inc.
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